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Module Descriptor School of Computer Science and Statistics

Module CodeCS4021
Module NameAdvanced Computer Architecture
Module Short Titlen/a
Semester TaughtSemester 1
Contact Hours

Lecture hours27
Lab hours0
Tutorial hours:6

Total hours: 33 + Coursework

Module PersonnelDr Jeremy Jones
Learning Outcomes

Students who successfully complete this module should be able to:

  • use Spin to check the correctness of parallel algorithms
  • code and evaluate a selection of techniques and algorithms for implementing locks
  • code and evaluate a selection of lockless algorithms
  • describe the operation of hardware transactional memory
  • code and evaluate a selection of lockless algorithms that make use of hardware transaction memory
Learning Aims

To provide students with theoretical and practical experience of concurrent programming with and without locks.

Module Content
  • simple locks
  • using Spin to check the correctness of parallel algorithms
  • IA32 and x64 atomic and serialising instructions
  • load locked / store conditional (LL/SC) instructions
  • the impact of cache coherency
  • the cost of sharing data between threads in a multiprocessor
  • lock implementations and their evaluation (eg. testAndSet, testAndTestAndSet, ticket, MCS, Peterson, …)
  • the compare and swap instruction
  • lockless algorithms [eg. a Trieber Stack, lockless ordered lists, …]
  • memory ordering and consistency
  • the ABA problem
  • memory management for lockless algorithms [eg. Hazard pointers] 
  • hardware transactional memory [eg Intel Haswell CPUs]
  • hardware lock elision
Recommended Reading List

The Art of Multiprocessor Programming by Maurice Herlihy and Nir Shavit

Module Prerequisites


Assessment Details

Exam (2 hrs):80%

Module Website
Academic Year of Data2017/18