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Module Descriptor School of Computer Science and Statistics

Module CodeCS1026
Module NameDigital Logic Design
Module Short TitleN/A
ECTS10
Semester TaughtSemester 1 & 2
Contact Hours

Lecture hours: 44

Lab hours: 16 hours Semester 1; 11 hours Semester 2
( Semester 1: 4 groups attend 2hr lab on 2-week cycle, so there are 16hrs of lab sessions)
Semester 2: 1 hour labs every week with end of week lab upload)

Tutorial: 22 hours

Total hours: 93 hours

Module PersonnelLecturing Staff: John Waldron and Paula Roberts
Learning Outcomes

When students have successfully completed this module they should be able to:

● State and apply the laws and standard methods of Boolean algebra to the manipulation of logic functions
● Analyze and design combinatorial logic functions.
● Implement digital logic designs in hardware.
● Conduct and describe experiments to verify the correct behaviour of a digital logic circuit and, where necessary, locate and correct faults
● Synchronous / Asynchronous logic
● Flip Flops and Storage Elements
● Algorithmic State Machines
● Introduction Advanced Digital Logic topics

Learning Aims

The lectures do not assume any prior knowledge of the subject, and build gradually in difficulty towards the end of the course. Starting with the theoretical foundations of logic, the students learn about combinatorial logic and synchronous logic, and how it can be used to construct logic functions that are useful in computing systems. The focus is on laying the groundwork for the hardware courses in the second year. Care is taken that the students realize the subject applies to both computer software and hardware. Laboratory experiments reinforce the concepts as well as adding variety and introducing practical elements.

Module Content

Shannon’s switching algebra, Boolean functions, other logic operators, simplification of Boolean functions, Karnaugh maps, combinatorial rule, exceptions to rule, don't care outputs & inputs, arithmetic logic, MUXes/deMUXes, decoders, programmable logic, ROMS, PALs, PLAs.

Edge triggering, master/slave and edge-triggered flip-flops, characteristic equations, synchronous sequential logic, finite state machines, machine classes, state tables & diagrams, FSM design, state equivalence, minimization, state equations, algorithmic state machines, ASM design, control paths, data paths, counters and sequencers, ASM design examples.

Recommended Reading List

Apart from instructions for experiments, there are no handouts for this course. The textbook encapsulates the material very well. The laboratory experiments are derived from those in the textbook


Textbook: Maurice M. Mano, Digital Design, (Prentice-Hall)

Module Prerequisites

None

Assessment Details

% Exam: 80

% Coursework: 20
In the supplemental examinations, assessment is by written examination only, which contributes 100% of the overall mark.

Module Website
Academic Year of Data2017/18